09EA01 / 09EE01 applied mathematics for systems engineering




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Total 42

REFERENCES:

1. Kamran Eshraghian, Douglas A Pucknell and Sholeh Eshraghian, “Essentials of VLSI Circuits and Systems,”

Prentice Hall of India, New Delhi, 2005.

2. Neil H E West and Kamran Eshranghian, "Principles of CMOS VLSI Design: A system Perspective", Addision-Wesley, 2nd

Edition, 2004.

3. Sung-Mo Kang and Yusuf Leblebici,” CMOS Digital Integrated Circuits”,Tata McGraw-Hill,3rd Edition, New Delhi,2008.

4. Jan M Rabaey, Chandrasekaran A and Nikolic B, “Digital Integrated Circuits,” Pearson Education,3rd Edition, 2004.

5. Amar Mukherjee, "Introduction to nMOS and CMOS VLSI System Design", Prentice Hall, USA, 1986.

6. WayneWolf," Modern VLSI Design: Systems on Chip Design" , Pearson Education Inc., 3nd Edition , Indian Reprint, 2007.


09EA07/09ED20/09EE07 EMBEDDED SYSTEMS DESIGN

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INTRODUCTION : Introduction – Characteristics of Embedded Computing Applications – Challenges in Embedded Computing Design – The Design Process : Requirements – Specification – Architecture Design – Designing Hardware and Software Components – System Integration and Testing – Structural Description – Behavioral Description. (8)


THE EMBEDDED COMPUTING PLATFORM : The CPU Bus – Memory Devices – I/O Devices – Component Interfacing – Development and Debugging – Testing – Design Example : Alarm Clock. (9)


PROGRAM DESIGN AND ANALYSIS : Introduction – Design Patterns – Data Flow Graphs – Control/Data Flow Graphs – Assembly and Linking – Basic Compilation Techniques – Analysis and Optimization of Execution Time, Energy, Power and Program Size – Program Validation and Testing – Design Example : Software Modem. (9)


SYSTEM DESIGN TECHNIQUES : Introduction – Design Methodologies – Requirements Analysis – Specifications – System Analysis and Architecture Design – Quality Assurance – Design Examples : Telephone PBX – Ink Jet Printer – Personal Digital Assistant – Set-Top Boxes. (8)


SOFTWARE DEVELOPMENT AND TOOLS : Introduction to Assembler, Compiler, Cross-Compiler, Linker and Integrated Development Environment – Debugging Strategies – Simulators – Emulators – Logic Analysers – Introduction to JTAG (8)


Total 42


REFERENCES :

  1. Wayne Wolf, “Computer as Components – Principles of Embedded Computing System Design”, Harcourt India Pvt. Ltd., 2001.

  2. David E Simon, “An Embedded Software Primer”, Pearson Education, 2004.

  3. Frank Vahid and Tony Givargis, “Embedded Systems Design : A Unified Hardware/Software Introduction”, John Wiley, 2005.

  4. Steve Heath, “Embedded Systems Design”, Elsevier Science, 2003.

  5. Arnold Berger, “Embedded Systems Design : An Introduction to Processes, Tools and Techniques”, CMP Books, 2005.

  6. Rechard Zurawski, “Embedded Systems Handbook” CRC Press, 2006.




09EM23/09EA08/09ED24/09EE04 MICROCONTROLLERS AND APPLICATIONS

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INTEL 8051 : Architecture of 8051 - Memory organisation - Register Banks - Bit addressable area - SFR area – Addressing modes – Instruction set - Programming examples (8)


8051 Interrupt structure -Timer modules - Serial features - Port structure - Power saving modes - MCS51 Family features: 8031/8051/8751 (8)


ARM PROCESSORS: ARM Programmer’s Model – Registers – Processor Modes – State of the processor – Condition Flags – ARM Pipelines – Exception Vector Table – ARM Processor Families – Introduction to ARM Memory Management Unit (7)


ARM Addressing Modes – ARM Instruction Set Overview – Thumb Instruction Set Overview – LPC210X ARM Processor Features (6)


PIC MICROCONTROLLERS: Program memory – CPU registers – Register File Structure – Block diagram of PIC 16C74 – I/O ports. (4)


Timer 0, 1 and 2 features – Interrupt logic – Serial peripheral interface – IC Bus – ADC – UART – PIC Family parts (5)


TYPICAL APPLICATIONS: Stepper Motor Control - DC Motor Control - AC Power Control - Introduction to micro controller development tools (4)


Total 42

REFERENCES:

1. "8-bit Embedded Controllers", Intel Corporation, 1990.

2. John Peatman, "Design with Microcontrollers", McGraw Hill, Singapore, 1988.

3. John B Peatman, “Design with PIC Microcontrollers”, Pearson Education Inc, India, 2005.

4. ARM System Developer’s Guide”, Andrew Sloss, Morgan Kaufmann Publishers, 2005

5. Steve Furber, “ARM System-on-Chip Architecture”, Pearson Education, 2005

6. “LPC210x ARM Processor Datasheet” Rev. 5, Philips Electronics, 2004

7. “ARM7TDMI Technical Reference Manual”, ARM Ltd., UK, 2004


09EA09 / 09EE28 COMPUTER ARCHITECTURE AND PARALLEL PROCESSING

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REGISTER TRANSFER LANGUAGE AND MICRO-OPERATIONS: Register transfer language – Inter-register transfer –- Arithmetic micro - operations – Logic micro-operations – Shift micro-operations – Control functions. (3)


DATAPATH AND CONTROL:– Data path Organisation - Binary arithmetic unit – BCD arithmetic unit – Floating point arithmetic unit – Processor bus configuration – Data transfer and manipulation – Hardwired and micro-programmed control. (5)


MEMORY UNIT: Memory hierarchy – Main memory – Back-up storage units – Multiple module memories – Interleaved memory – Associative memory - Virtual memory systems – Structure – Paging – TLB – Segmentation – Replacement strategies – Cache memory: Basic cache structure – Direct, fully associative and set associative mapping – Replacement policies – Multiple caches – Memory management hardware. (6)


INPUT-OUTPUT UNIT: Characteristics of I/O subsystem – Interrupt mechanisms and special hardware – Direct Memory Access – I/O processors and I/O channels – Asynchronous data transfer. (5)


PARALLEL PROCESSING: Basic uniprocessor architecture – Parallel processing mechanisms – Levels of parallelism – Balancing of subsystem bandwidth – Parallel computer structures – Architectural classifications – Parallel processing applications.            (3)


PIPELINING AND OTHER HIGH PERFORMANCE ARCHITECTURES: Linear pipelining – Pipeline processors – Instruction and Arithmetic pipelines – Organization of pipelined units – Instruction pre-fetch and branch handling – Pipeline hazards – Reducing branch penalties – Branch prediction strategies – Vector processing: requirements and characteristics – Superscalar Architecture – VLIW Architecture. (5)


ARRAY PROCESSING: SIMD array processors– Masking and data routing mechanisms – Parallel algorithms for array processors: SIMD Matrix multiplication – SIMD Interconnection networks – Associative array processing.   (5)

 

MULTIPROCESSOR ARCHITECTURE: Functional structures: Loosely and Tightly coupled Multiprocessors – Processor characteristics for multiprocessing – Symmetric Multiprocessors (SMP) – Non Uniform Memory Access (NUMA) – Interconnection structures for multiprocessors – Cache coherence – Thread level parallelism – Multithreading – Clusters. (6)

RISC ARCHITECTURE: Main characteristics of RISC architectures – RISC-CISC trade-offs – RISC pipelining.          (4)

                                                                                                                                                                                                                                                                                                                                                                      Total  42


REFERENCES :

1.  Mano, M.M., "Computer System Architecture", Prentice Hall of India, 3rd Edition, 1993.

2.   Kai Hwang and Faye A Briggs., "Computer Architecture and Parallel Processing",   McGraw Hill Book Company, 1985.

3. Stallings W., “Computer Organisation and Architecture – Designing for performance”, Prentice Hall of India, 7th

Edition, 2006.             

4. John Hennessy and David Patterson, "Computer Architecture: A Quantitative approach", Morgan Kaufmann

Publishers, 4tth Edition, 2007.

5.  Dezso Sima, Terence Fountain, Peter Kacsuk, “Advanced Computer Architectures: A Design Space Approach”

Addison Wesley, 1997

6. Moreshwar R.Bhujade, ” Parallel Computing”, New Age International Pvt. Ltd., 1995


09EA11 ALGORITHMS FOR VLSI DESIGN AUTOMATION

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INTRODUCTION TO DESIGN METHODOLOGIES: VLSI Design problem-The Design Domains-Design methods and Technologies. (4)


ALGORITHMIC GRAPH THEORY AND COMPUTATIONAL COMPLEXITY: Data structures for the representation of graphs - Computational Complexity - Graph Algorithms - Depth first search - Breadth first search - Dijkstra's shortest path algorithm - Prim's algorithm. (7)


PLACEMENT, PARTITIONING AND FLOOR PLANNING: Circuit representation - Types of Placement problem - Iterative Improvement - Partitioning - Kernighan - Lin Partitioning algorithm - Floor Planning - Representation - Shape functions and floor plan sizing. (9)


ROUTING: Local routing problems - Area routing - Channel routing - Global routing. (8)


SIMULATION: Gate level modeling and simulation - Compiler driven simulation - Event driven simulation - Switch-level modeling and simulation. (7)


HIGH LEVEL SYNTHESIS: Hardware models - Allocation - Assignment - Scheduling - Assignment Problem - High level transformation. (7)

Total 42


REFERENCES :

1. Sabih H.Gerez, "Algorithms for VLSI Design Automation", John Wiley & Sons, 2007.

2. WayneWolf," Modern VLSI Design: Systems on Chip Design", Pearson Education Inc., 3nd Edition, Indian Reprint, 2007.

3. Naveed Sherwani, " Algorithms For VLSI Physical Design Automation ", Springer-Verlag, 3rd Edition,2007.

4. Sadiq M Sait and Habib Youssef, "VLSI Physical Design Automation", IEEE Press, New York., 1995.

5. Abramovici M, Brever A and Friendman D, "Digital Systems Testing and Testable Design", Jaico Publishing House, 2004.


09EA12 VLSI TESTING AND TESTABILITY

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TESTING AND TESTABLE DESIGN OF DIGITAL SYSTEMS : Need for testing - Fault models - Fault detection and redundancy - Combinational circuits – Sequential circuits - Fault equivalence - Fault dominance – Logic simulation - Compiler driven Simulation - Event driven Simulation - Fault simulation techniques - Serial, parallel, deductive. (9)


TESTING FOR SINGLE STUCK AT - FAULTS: Test generation algorithms for combinational circuits - Fault oriented ATG – D-algorithm – Examples – PODEM – Fault independent ATG - Random test generation – ATG for SSFs in sequential circuits -TG using iterative array models - Random test generation. (9)


DELAY TEST : Delay test problem – Path delay test – Transition faults – Delay test methodologies. (7)


ANALOG AND MIXED SIGNAL TEST : DSP based analog and mixed signal test – Static ADC and DAC testing methods - Model based Analog and Mixed signal Test - Analog fault models-Analog fault simulation – Analog ATPG (9)

DESIGN FOR TESTABILITY: Adhoc design for testability techniques - Controllability and Observability by means of scan registers – Storage cells for scan designs – Level Sensitive Scan Design - LSSD - Partial Scan – Boundary scan – BIST concepts and architectures (8)

Total 42


REFERENCES:

1. Abramovici, M., Brever, A., and Friedman, D., "Digital Systems Testing and Testable Design", Jaico Publishing House, 2002.

2. Michael L Bushnell and Vishwani D Agarwal, “Essentials of Electronic Testing for Digital, Memory and Mixed Signal Circuits”, Springer, verlag 2000.

3. Stanley L Hurst “VLSI Testing : Digital and Mixed Analogue Digital Techniques”, Institute of Electrical Engineers,1998

4. Xiaoqing Wen, Cheng Wen Wu and Laung Terng Wang “VLSI Test Principles and Architectures: Design for Testability”, Cambridge University Press, 2000.

5. Parag K Lala, “Fault Tolerant and Fault Testable Hardware Design” BS Publications, 2002.


09EA13 MIXED SIGNAL VLSI DESIGN

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BASIC ANALOG BUILDING BLOCKS: Current mirrors – Voltage sources/references – Voltage amplifiers – Transconductance and Transresistance amplifiers – Operational amplifiers – Comparators – Multipliers. (7)


INTRODUCTION TO ACTIVE FILTERS AND SWITCHED CAPACITOR FILTERS: Active RC Filters for monolithic filer design : First and Second order filter realizations - Universal active filter (KHN) – Self tuned filter – Programmable filters – Switched capacitor filters: Switched capacitor resistors – amplifiers – comparators – sample and hold circuits – Integrator – Biquad. (9)


CONTINUOUS TIME FILTERS AND DIGITAL FILTERS: Introduction to Gm-C filters – bipolar transconductors – CMOS Transconductors using Triode transistors, active transistors – BiCMOS transconductors – MOSFET_C Filters – Tuning Circuitry – Dynamic range performance – Digital Filters: Sampling - decimation – Interpolation – Implementation of FIR and IIR filters. (8)


DIGITAL TO ANALOG AND ANALOG TO DIGITAL CONVERTERS: Non-idealities in the DAC – Types of DACs: Current switched, Resistive, Charge redistribution (capacitive), Hybrid, segmented DACs – Techniques for improving linearity – Analog to Digital Converters: quantization errors – non-idealities – types of ADCs: Flash, two step, pipelined, successive approximation, folding ADCs. (9)


SIGMA DELTA CONVERTERS: Over sampled converters – Over sampling with out noise and with noise – Implementation imperfections – First order modulator – Decimation filters – Second order modulator – Sigma delta DAC and ADCs. (5)


MIXED LAYOUT: CMOS design rules – Layout of CMOS – BJT – Capacitors – Resistors – Mixed layout issues: Floor planning, power supply and ground, fully differential matching, Guard rings and shielding. (4)


Total 42


REFERENCES:

1. David A Johns, Ken Martin, " Analog Integrated Circuit Design” John Wiley and Sons, 2005

2. Baker R J, Li H W, and Boyce D E, “CMOS: Circuit Design, Layout and Simulation”, Prentice Hall of India,2005

3. Phillip Allen and Douglas Holmberg, “CMOS Analog Circuit Design”, 2nd Edition, Oxford University Press, 2004.

4. Rudy van de Plassche, “Integrated Analog-to-Digital and Digital –to-Analog Converters“, Springer India,2005.

5. Benhard Razavi, “Data Converters”, Kluwer publishers, 1999.

6. Antoniou, “Digital filters analysis and design”, Tata McGraw Hill, New Delhi, 1998.


09EA14 HARDWARE DESIGN VERIFICATION TECHNIQUES

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HARDWARE DESIGN VERIFICATION : Introduction – Testing Versus Verification – Design and Verification reuse. (2)

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