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214373 ArtistDesign NoE JPRA Year 4 (Jan-Dec 2011)

Cluster: Hardware Platforms and MPSoCs D12-(6.1)-Y4
Activity: Platform and MPSoC Design








IST-214373 ArtistDesign
Network of Excellence
on Design for Embedded Systems



Activity Progress Report for Year 4


Platform and MPSoC Design


Cluster:

Hardware Platforms and MPSoC


Activity Leader:

Prof. Luca Benini (UNIBO)

www-micrel.deis.unibo.it


Policy Objective (abstract)

The main objective of the activity is to build a common research environment and a wide basis of technical and scientific competences on embedded platforms, with special emphasis on Multi-processor Systems-on-Chip (MPSoCs). The main challenges are the significant fragmentation and lack of integration in this area. The consensus on the fact that hardware platforms for embedded applications will be multi-core, with increasing degrees of parallelism, is not matched at the software and system design level. The teams involved in the activity aim at building stronger common techniques for modeling, analysis and run-time management of embedded hardware platforms. The expected impact will be a faster and more consistently focused development of methods and tools in support of application development and mapping.


Versions


number

Comment

date

1.0

First version delivered to the reviewers

January 20th 2012





Table of Contents

1. Overview of the Activity 3

1.1 ArtistDesign participants and their role within the Activity 3

1.2 Affiliated participants and their role within the Activity 3

1.3 Starting Date, and Expected Ending Date 4

1.4 Policy Objective 5

1.5 Background 5

1.6 Technical Description: Joint Research 6

1.7 Work achieved in Year 1 (Jan-Dec 2008) 7

1.8 Work achieved in Year 2 (Jan-Dec 2009) 8

1.9 Work achieved in Year 3 (Jan-Dec 2010) 10

1.10 Problems Tackled in Year 4 (Jan-Dec 2011) 11

2. Summary of Activity Progress in Year 4 (Jan-Dec 2011) 15

2.1 Technical Achievements 15

2.2 Individual Publications Resulting from these Achievements 23

2.3 Interaction and Building Excellence between Partners 27

2.4 Joint Publications Resulting from these Achievements 28

2.5 Keynotes, Workshops, Tutorials 29

3. Milestones, and Future Evolution 38

3.1 Problems to be Tackled in the future 38

3.2 Current and Future Milestones 39

3.3 Main Funding 39

4. Internal Reviewers for this Deliverable 43

1.Overview of the Activity

1.1ArtistDesign participants and their role within the Activity


Team leader: Prof. Lothar Thiele – TIK, ETH Zürich (Switzerland). Role: design methods for MPSoC that combine performance analysis with multi-objective application mapping strategies. To this end, an available programming environment DOL (distributed operation layer) will be enhanced and combined with tools from other partners.

Team leader: Prof. Petru Eles – Linköping University (Sweden). Roles: (i) Analysis and Optimization of real-time and fault-tolerant applications implemented on distributed Platforms and MPSoC. (ii) Analysis and Optimization of energy efficient, time constrained embedded systems.

Team Leader: Prof. Luca Benini – UNIBO (Italy). Roles: (i) Development of power modeling and estimation framework for systems-on-chip. (ii) Development of optimal allocation and scheduling techniques for energy-efficient mapping of multi-task applications onto multi-processor systems-on-chips. (iii) Development of energy-scavenging techniques for ultra-low power sensor network platforms.

Team Leader: Prof. Jan Madsen – IMM, Technical University of Denmark (Denmark) Areas of his team's expertise: abstract RTOS and NoC models for multiprocessor system simulation and verification. Modeling and analysis of fault-tolerant embedded systems.

Team Leader: Prof. Rolf Ernst – TU Braunschweig (Germany) Roles: TU Braunschweig contributes methods to deal with variability and reliability issues for systems built from unreliable components.

Team Leader: Dr. Chantal Ykman-Couvreur – IMEC vzw. (Belgium) Imec contributes to design-time and run-time resource management optimizations for MPSoC platforms.

Team Leader: Dr. Raphaël David – CEA LIST (France)

(i) Development of exploration framework for multi- and many-core architectures

(ii) Development of advance strategies for the deployment and the management of multi-tasks applications onto multi- and many-core devices

(iii) Design of multi-core architectures for dynamic multi-task applications

Team Leader: Prof. Giovanni De Micheli – EPF Lausanne (Switzerland). This team will work on novel models and policies for run-time control of MPSoC platforms. Areas of expertise include hardware design methods and tools, algorithms, real-time systems and 3D integration.

--- Changes wrt Y3 deliverable --


Dr. Chantal Ykman-Couvreur replaces Dr. Maya Dhondt as IMEC representative

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