1. Title of Subject

Digital Logic Design

2. Subject Code

EEN1036

3. Status of Subject

Core 
4. Stage

Degree 
5. Version

Date of Previous Version : May 1998, May 2000 Date of Current Version : December 2004

6. Credit Hour EAC’s Credit Hours Equivalent

3

3.39 (3 + 0.39) 3 represents lectures (3 hours per week 14 weeks) 0.39 represents assignment, tutorials or labs (5 hours of assignments/tutorials, 6 hours of labs)

7. PreRequisite

None 
8. Teaching Staff
Tutor 
Dr. Tan Ai Hui, PhD (Engineering), B.Eng.(Hons Electronic Engineering) Md. Shabiul Islam, M.Sc.(Bangladesh), M.Sc.(UKM), B.Sc.(Hons)(Bangladesh) Siew Wee Ong, M.Sc.(Laser Physics), B.Sc.(Hons Physics) Mah Siew Kien, MSc.(Optical Communications), B.Eng(Hons Electric, Electronics & System) Muhazam Mustapha, B. Eng (Electrical and Electronics Engineering)
Pechin Lo Chien Pau, B.Eng. (Hons) Electronics Majoring in Computer Chan Mun Leong, B.Eng(Telecommunications)

9. Semester

Year, Trimester 2

10. Aim of Subject

To provide a basic understanding of the basics of logic circuits and their applications in digital system.

11. Learning Outcome of Subject

At the completion of the subject, students should be able to: describe the differences between analog and digital systems, and their respective advantages and disadvantages. understand positional notations, number systems and computer codes. apply algebraic methods based on Boolean algebra and truth table to analyse logic circuits. apply minimisation methods such as Karnaugh maps and Quine McCluskey tabular method to simplify switching functions. understand the concepts of sequential logic and memory devices. design modular combinational circuits using encoders, decoders, multiplexers and demultiplexers. 
Programme Outcomes  % of contribution 
Ability to acquire and apply fundamental principles of science and engineering.
 50 
Capability to communicate effectively.  10 
Acquisition of technical competence in specialised areas of engineering discipline.  10 
Ability to identify, formulate and model problems and find engineering solutions based on a systems approach.  15 
Understanding of the importance of sustainability and costeffectiveness in design and development of engineering solutions.  5 
Ability to work independently as well as with others in a team.
 10 
12. Assessment Scheme  Lab Experiments
 Work in group of 2 Written and oral assessment at the end of lab
 10%

Tutorial / Assignment  Group assignment To enhance understanding of basic concepts in lecture
 15%

Test Quiz   15%

Final Exam   60%

13. Details of Subject  Topics  Hours 

Introduction Digital vs. analog systems. Digital system design hierarchy. Organization of a stored program digital computer. Logic devices: TTL and CMOS families.

6 
Number Systems and Codes Positional notation, number systems, binary arithmetic, octal arithmetic, hexadecimal arithmetic. Base conversions. Signed number representation, computer codes.

3 
Algebraic Methods for the Analysis and Synthesis of Logic Circuits Fundamentals of Boolean algebra. Basic postulates: fundamental theorems of, Boolean algebra, switching functions, truth tables. Algebraic forms of switching functions. Derivation of canonical forms. Switching circuits. Electronic logic gates, basic functional components. Analysis of combinational circuits. Synthesis of combinational logic Circuits. ANDOR and NAND networks, ORAND and NOR networks. Twolevel circuits. ANDORinverter circuits. Computeraided design of logic circuits..

7 
Simplification of Switching Functions Characteristics of minimization methods. Karnaugh maps. Kmaps of four or more variables. Plotting functions in canonical form on the Kmap. Simplification of switching functions using Kmaps. Algorithms for deriving minimal SOP forms from Kmaps. POS form using Kmaps. Algorithms for deriving minimal POS forms from Kmaps. QuineMcCluskey tabular minimization method. Computeraided minimization of switching functions. Algebraic methods for determining prime implicants.

10 
Introduction to Sequential Logic Models for sequential circuits. Block diagram representation. State tables and diagrams. Memory devices. Latches: setreset latch, gated SR latch, delay latch. Flipflops: masterslave SR flipflops, masterslave D flipflops, masterslave JK flipflops, edgetriggered D flipflops, edgetriggered JK flipflops, T flipflops. Other memory devices. Timing circuits.

8

Modular Combinational Logic Modular Design. Decoders. Decoder Circuit Structures. Implementing Logic Functions Using Decoder. Encoder Circuit Structures. Multiplexers/Data. Selectors. Multiplexer Circuit Structures. Applications of Multiplexers. Demultiplexers/Data Distributors. Binary Arithmetic Elements. Binary Adder Circuits. Binary Subtraction Circuits. Arithmetic Overflow Detection. Comparators. Design Example: A Computer Arithmetic Logic Unit. Computeraided Design of Modular Systems

8

14. Teaching and Learning Activities 
This subject will be delivered using the following means: Lecture Hours = 42 hours Supervised Tutorial Hours = 5 Laboratory Experiments = 6 Total Contact Hours = 53

15. Laboratory

DL1: Logic Gates And Their Applications DL2: Flipflop And Their Applications

16. Reading Materials 
Textbook
 Donald D. Givone, “Digital Principles and Design”, McGrawHill, 2003

Reference Materials 
Alan B. Marcovitz, “Introduction to Logic Design”, 2nd ed., McGrawHill, 2005 Ronald J. Tocci, Neal S. Widmer and Gregory L. Moss, “Digital Systems  Principles and Applications”, 9th ed., PrenticeHall, 2004 S. Brown and Z. Vranesic, “Fundamentals of Digital Logic with VHDL Design”, 2nd ed., McGrawHill, 2005 