Eac’s Credit Hours Equivalent 3

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LAN-TC-01 Edisi ke 2 : Tatacara Kelulusan Bagi Kursus Pengajian Institusi Pendidikan Tinggi Swasta (IPTS) Bagi Peringkat Sijil, Diploma dan Ijazah Sarjana Muda.

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1. Title of Subject

Digital Logic Design

2. Subject Code

ECE107

3. Status of Subject

Core

4. Stage

Degree

5. Version

Date of Current Version : July 2009

6. Credit Hour

3

3.69(3 + 0.69)

3 represents lectures (3 hours per week  14 weeks)

0.69 represents tutorials, labs assignment (6 hours of tutorials (0.2) , 9 hours of labs (0.32), assignment 7 hours (0.17)

7. Pre-Requisite

None

8. Teaching Staff

Not assigned yet

9. Semester

Year 1, Semester 1

10. Aim of Subject

To provide a basic understanding of the basics of digital logic circuits and their applications in digital system.

11. Learning Outcome

of Subject

At the completion of the subject, students should be able to:

1. describe the differences between analog and digital systems, and their

1. Analyze and design combinational and sequential logic circuit

2. apply algebraic methods based on Boolean algebra and truth table to

3. apply the concepts of sequential logic and memory devices in digital systems.

4. Analyze and design modular combinational circuits using encoders, decoders, multiplexers and demultiplexers.

12. Assessment Scheme

Lab Experiments

• Work in group of 2

• Written and oral assessment at the end of lab

10%

Tutorial / Assignment

• Group assignment

• To enhance understanding of basic concepts in lecture

15%

Test Quiz

• Written exam

15%

Final Exam

• Written exam

60%

13. Details of Subject

Topics

Hours

Introduction

Numerical Representation, Digital and Analog Systems, Digital Number Systems, Representing Binary Quantities, Digital Circuits/Logic Circuits, Parallel and Serial Transmission, Memory, Digital Computers

2

Number Systems and Codes

Binary-to-Decimal Conversions, Decimal-to-Binary Conversions, Hexadecimal Number System, BCD Code, The Gray Code, Alphanumeric Codes

2

Describing Logic Circuits

Boolean Constants and Variables, Truth Tables, OR Operation with OR Gates, AND Operation with AND Gates, NOT Operation

Describing Logic Circuits Algebraically, Evaluating Logic-Circuit Outputs, Implementing Circuits from Boolean Expressions,

NOR Gates and NAND Gates, Boolean Theorems, DeMorgan Theorems, Universality of NAND Gates and NOR Gates

Alternate Logic-Gate Representations, Which Gate Representation to Use, IEEE/ANSI Standard Logic Symbols, Description Languages Versus Programming Languages, Implementing Logic Circuits with PLDs, HDL Format and Syntax

7

Combinational Logic Circuits

Sum-of-Products Form, Simplifying Logic Circuits, Algebraic Simplification

Designing Combinational Logic Circuits, Karnaugh Map Method, Exclusive-OR and Exclusive-NOR Circuits, Parity Generator and Checker, Enable/Disable Circuits, Basic Characteristics of Digital ICs, Programmable Logic Devices

10

Sequential Logic Circuits

NAND Gate Latch, NOR Gate Latch, Digital Pulses, Clock Signals and Clocked Flip-Flops, Clocked S-R Flip-Flop, Clocked J-K Flip-Flop

Clocked D Flip-Flop, D Latch (Transparent Latch), Asynchronous Inputs

IEEE/ANSI Symbols, Flip-Flop Timing Considerations, Potential Timing Problem in FF Circuits, Flip-Flop Applications, Flip-Flop Synchronization

Detecting an Input Sequence, Data Storage and Transfer, Serial Data Transfer: Shift Registers, Frequency Division and Counting, Schmitt-Trigger Devices, One-Shot (Monostable Multivibrator), Clock Generator Circuits

8

Modular Combinational Logic

Modular Design. Decoders. Decoder Circuit Structures. Implementing Logic Functions Using Decoder. Encoder Circuit Structures. Multiplexers/Data. Selectors. Multiplexer Circuit Structures. Applications of Multiplexers. Demultiplexers/Data Distributors. Binary Arithmetic Elements. Binary Adder Circuits. Binary Subtraction Circuits. Arithmetic Overflow Detection. Comparators. Design Example: A Computer Arithmetic Logic Unit. Computer-aided Design of Modular Systems

8

Counters and Registers

Asynchronous (Ripple) Counters, Propagation Delay in Ripple Counters, Synchronous (Parallel) Counters, Counters with MOD Numbers < 2N, Synchronous Down and Up/Down Counters

Synchronous Counter Design, State Machines.

5

14. Teaching and

Learning Activities

This subject will be delivered using the following means:

• Lecture Hours = 42 hours

• Supervised Tutorial Hours = 6

• Laboratory Experiments = 9

Total Contact Hours = 57

15. Laboratory

1. Combinational Logic Circuits And Their Applications

2. Sequential logic circuit And Their Applications

3. Counter design

16. Details of Assignment

Example:

Title: Digital circuit design and analysis

Objective: To enhance students’ skills in applying minimisation methods to simplify Boolean functions, analyzing the behaviour of sequential circuits, and designing modular combinational circuits.

Type: Design and analysis.

Description: Students are required to apply minimisation methods such as Karnaugh map or Quine-McCluskey to a design problem, analyze the behaviour of sequential circuits, and design modular combinational circuits for a specific application.

Textbook

Tocci, R.J., “Digital Systems: Principles and Applications”, 9th Ed, Prentice Hall 2006

Reference Materials

1. Alan B. Marcovitz, “Introduction to Logic Design”, 2nd ed., McGraw-Hill, 2005

2. Ronald J. Tocci, Neal S. Widmer and Gregory L. Moss, “Digital Systems - Principles and Applications”, 9th ed., Prentice-Hall, 2004

3. S. Brown and Z. Vranesic, “Fundamentals of Digital Logic with VHDL Design”, 2nd ed., McGraw-Hill, 2005

17. Program Outcomes
 No Program Outcomes Supported by Learning Outcomes (LO) and Activities P1 Ability to acquire and apply knowledge of science and engineering fundamentals. LO1-5 Exam, test, tutorial, assignment, lab P2 Acquired in‐depth technical competence in electronic engineering discipline. LO1-5 Exam, test, tutorial, assignment, lab P3 Ability to undertake problem identification, formulation and solution LO1-5 Exam, test, tutorial, assignment, lab P4 Ability to utilise systems approach to design and evaluate operational performance. Assignment, lab P5 Understanding of the principles of design for sustainable development LO1-5 Exam, test, tutorial, assignment, lab P6 Understanding of professional and ethical responsibilities and commitment to them. Exam, test, tutorial, assignment, lab P7 Ability to communicate effectively, not only with engineers but also with the community at large. Tutorial, assignment, lab P8 Ability to function effectively as an individual and in a group with the capacity to be a leader or manager. Tutorial, assignment, lab P9 Understanding of the social, cultural, global and environmental responsibilities of a professional engineer Assignment, lab P10 Recognising the need to undertake life‐long learning, and possessing/acquiring the capacity to do so Assignment

Borang ini diisi berasaskan buku “Garis Panduan Prosedur Dan Proses Mendapatkan Kelulusan, Standard Minimum Dan Perakuan Akreditasi Kursus Pengajian IPTS”, buku “Garis Panduan Standard Dan Kriteria Kursus Pengajian IPTS” dan buku “Bimbingan Menyediakan Dokumen Memohon Kelulusan Dan Perakuan Akreditasi Kursus Pengajian IPTS”

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