09EA01 / 09EE01 applied mathematics for systems engineering




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ME APPLIED ELECTRONICS SYLLABUS


09EA01 / 09EE01 APPLIED MATHEMATICS FOR SYSTEMS ENGINEERING

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CALCULUS OF VARIATIONS: Maximum and minimum of functions of several independent variables – Lagrangian method of multipliers – Variational problems of fixed boundaries only: Simplest variational problems – Euler equation – Brachistochrone problem – Variational problems involving several unknown functions – Functional involving first and second order derivations – Functional involving two or more independent variables – Isoperimetric problems. (9)


VECTOR SPACE: Definition and examples of liner space – Linear dependence and independence – Basis and Dimension – Inner product space – Orthogonalisation process. (7)


STOCHASTIC PROCESSES: Introduction and classification of stochastic processes , Poisson process- Discrete Markov chain, computation of n-step transition probabilities, state classification and continuous time Markov chain – Birth and death processes, pure birth process and pure death process applications. (12)


PETRINETS: Basic concepts of Petri nets and their use in modeling of discrete-event systems – Classification of Petri nets.

(7)


GRAPH THEORY: Introduction – Basic terminology – Representation of graphs – Connected graphs – Matrix representation of graphs (excluding graphs) – Applications – Critical path method – Shortest path problems – trees – definition – Binary tree.

(7)


Total 42

REFERENCES:

1. Elsgolts L, “Differential Equation and Calculus of variation”, MIR Publishers, 1996.

2. John T. Schick, “Linear Algebra with Applications”, McGraw Hill Company, 1997

3. Howard Anton, “Elementary Linear Algebra”, John Wiley & Sons, 2008

4. Sheldon M. Ross, “Introduction to Probability Models”, Academic Press, 2001

5. Trivedi K.S, “Probability and Statistics with Reliability, Queuing and Computer Science Applications, Prentice Hall, 2003.

6. Reisig W, “Petri Nets: An Introduction”, Springer Verlag 1985.

7. Girault C. and Valk R, “Petri Nets for Systems Engineering: A Guide to Modeling, Verification and Applications”, Springer

Verlag 2003.

8. Jonathan Gross and Jay Yellen, “Graph Theory and its Applications”, CRC Press, 2006

9. Narsingh Deo, “Graph Theory with Applications to Engineering and Computer Science”, Prentice Hall, 2004

.


09EA02/09ED02/09EM02 LINEAR SYSTEMS

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MODERN CONTROL THEORY: Limitations of conventional control theory - Concepts of state, State variables and state model – state model for linear time invariant systems:State space representation using physical-Phase and canonical variables. (8)


SYSTEM RESPONSE: Transfer function from state model - Transfer matrix - Decomposition of transfer functions Direct, cascade and parallel decomposition techniques - Solution of state equation - State transition matrix computation. (9)


DISCRETE SYSTEM: State space representation of discrete system - Decomposition of Transfer functions - Solution of discrete time system - state transistion matrix - Discretisation of continuous time state equations. (8)


SYSTEM MODELS: Characteristic equation - Eigen values and Eigen vectors - Invariance of Eigen values -Diagonalization - Jordan Canonical form - Concepts of controllability and observability - Kalman's and Gilbert's tests - Controllable and observable phase variable forms - Effect of pole-zero cancellation on controllability and observability. (9)


LIAPUNOV STABILITY: Liapunov stability analysis - Stability in the sense of Liapunov - Definiteness of Scalar Functions – Quadratic forms - Second method of Liapunov - Liapunov stability analysis of linear time invariant systems. (8)


Total 42

 

REFERENCES:

1. Katsuhiko Ogata, "Modern Control Engineering", Prentice Hall of India Private Ltd., New Delhi, 3rd Edition, 2002.

2 Nagrath I.J. and Gopal M., "Control Systems Engineering", New Age International Publisher, New Delhi, 2006.

3. Gopal M, “Digital Control and State Variable Methods”, Tata McGraw-Hill Publishing Company Limited, New Delhi,India, 2nd Edition 2003.

4. Nise S. Norman, “Control Systems Engineering”, John Wiley & Sons, Inc, Delhi, 3rd Edition, 2000.

5. Benjamin C Kuo, ”Automatic Control Systems”, John Wiley & Sons, Inc., Delhi, 2002.


09EA03/09ED17/09EM27/09EE14  PERSONAL COMPUTER SYSTEMS

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ARCHITECTURE: AT architecture - DMAC - Interrupt controllers - Timers -Memory map - I/O map - AT BUS (ISA BUS) specifications –Extended and expanded memory - PCI Bus concepts. (6)


PERIPHERAL ADAPTERS: Keyboard Interfacing - Functional description of keyboard processing - Display Adapters: VGA and SVGA adapter – Functional configurations – AGP basics. (6)


FLOPPY DISKETTE TYPES: Hard disk structure - IDE Bus-SATA - CD-ROM structure - Printers Centronics parallel interface - Features of EPP and ECP modes of printers - USB Bus. (8)


ASSEMBLY LANGUAGE PROGRAMMING: Program development stages -Macro assembler: Directives - Macros - Linker - Debugger in real mode of the processor.  (8)


STRUCTURE OF MS-DOS: BIOS - DOS Kernel - Command processor – Boot record - File allocation table - File directory -Booting process of DOS-COM and EXE files - BIOS and DOS interrupts - Structure of device drivers. (7)


MULTIUSER/ MULTI-TASKING OPERATING SYSTEM CONCEPTS:  Scheduling - Protection - Memory management – Windows system architecture : Virtual hardware and device drivers - Windows virtual address space memory map - Comparison of WIN 16 and WIN 32 applications structure. (7)


Total   42

REFERENCES:

  1. Mathivanan N., “Microprocessors, PC Hardware Interfacing”, Prentice Hall of India, Reprint 2007. 

  2. Douglas V Hall, "Microprocessors and Interfacing: Programming and Hardware", McGraw Hill, Revised 2nd Edition-2006.

  3. Barry B Brey, "The Intel Microprocessor 8086/8088, 80186/80188, 80286, 80386, 80486, Pentium and Pentium Pro Processor, Pentium II ,III and IV Architecture, Programming and Interfacing", Prentice Hall of India, 4th Edition,2005.

  4. Ray Duncan, "Advanced MSDOS Programming", Microsoft Press, USA, 2002.

  5. Walter Oney, ”Systems Programming for Windows 95”, Microsoft Press, USA, 1996.

  6. IBM PC/AT Technical Reference Manual,1985.

  7. Walter Oney,”Programming the Microsoft Windows Driver Model”, South Asian 2nd Edition-2003.



09EA04/ED03/EE02 ADVANCED DIGITAL SIGNAL PROCESSING

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MULTIRATE DIGITAL SIGNAL PROCESSING: Decimation by an integer factor-Interpolation by an integer factor-Sampling rate conversion by rational factor-Decimation with poly phase filters-Interpolation with poly phase filters-Complementary filters-Interpolated FIR filters-Special FIR filters: Half band filter and Comb filter. (10)


TWO CHANNEL FILTER BANKS: Analysis and Synthesis Filter Banks-Quadrature Mirror Filter (QMF) banks-Filter bank with perfect reconstruction- Paraunitary filter banks -Biorthogonal and Linear phase filter banks-Transmultiplexer filter banks. (6)


UNIFORM-CHANNEL FILTER BANKS: Filter banks with tree structures, parallel structure-Complex modulated filter banks-Cosine modulated filter banks-Transmultiplexer filter banks-Polyphase QMF banks – Paraunitary polyphase and DFT polyphase filter banks-Subband coding. (6)


WAVELET TRANSFORM: Short-Time Fourier Transform – limitations - time-frequency scaling- Heisenberg’s uncertainty – Continuous Wavelet Transform – Discrete Wavelet Transform – Haar, Daubechy’s wavelets – Multi Resolution Analysis of audio signal. (8)


POWER SPECTRUM ESTIMATION: Estimation of spectra from finite duration observation of signals: Periodogram-use of DFT in power spectrum estimation - Non-parametric Methods: Bartlett-Welch-Blackman and Tuckey - Parametric Methods: Relationship between the autocorrelation and the model parameters - AR model: Yule-Walker method-Burg method-Unconstrained least squares method-Sequential estimation methods-MA model and ARMA model for power spectrum estimation-Filter bank realization of the periodogram-Eigen analysis algorithm for spectrum estimation. (12)


Total 42

REFERENCES:

  1. N.J.Fliege, “Multirate digital signal processing” John wiley & sons Ltd., Reprinted with correction, Jan 2000.

  2. Fredric J Harris, “Multirate signal processing for communication systems”, Prentice Hall, May 2004.

  3. Vaidyanathan, P.P.,”Multirate Systems and Filter Banks, Prentice Hall, Englewood cliffs, NJ,1993.

  4. Ronald E Crochiere, Lawrence R Rabiner, “Multirate DSP”, Prentice Hall, March 1983.

  5. John G Proakis and Dimitris G Manolakis, “Digital signal processing-Principles, Algorithms and Applications”, 4th Edition, Prentice Hall of India, 2007.

  6. Rao, R.M and A.S.Bopardikar,”Wavelet Transforms: Introduction to Theory and Applications, Addison Wesley,MA,1998.

  7. K.P.Soman and K.I.Ramachandran “Insight into Wavelets-From Theory to Practice”, Prentice Hall of India, 2005.

  8. Stephane Mallat “A Wavelet Tour of Signal Processing”, 2nd Edition, Published by Elsevier, a division of Reed Elsevier India private limited, 2008.

  9. Vaidyanathan, P.P.,”Multirate Systems and Filter Banks, Prentice Hall, Englewood cliffs, NJ,1993.



09EA05/09EE05  DIGITAL SYSTEM DESIGN AND TESTING

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SYSTEM DESIGN USING PLDS: Basic concepts – Programming technologies - Programmable Logic Element (PLE) - Programmable Array Logic (PLA) - Programmable Array Logic (PAL) – Programmable Logic Architectures – 16L8 – 16R4 – 22V10 –- Design of combinational and sequential  circuits using PLDs – Complex PLDs (CPLDs) – Design of state machines using Algorithmic State Machines (ASM) chart as a design tool.                                                                     (10)


FIELD PROGRAMMABLE GATE ARRAYS: Types of  FPGA - Xilinx XC3000 series - Logic Cell Array (LCA) – Configurable Logic Blocks (CLB) - Input/Output Blocks (IOB) - Programmable Interconnection  Points (PIP) - Xilinx XC4000 Series –Introduction to Xilinx SPARTAN, VIRTEX FPGA – Design examples.                                          (7)


INTRODUCTION TO VHDL:  Design process flow - Software tools – Hardware Description Languages  – VHDL : Data Objects - Data types - Operators – Entities and Architectures – Components and Configurations – Concurrent signal assignment – Conditional signal assignment - Selected signal assignment – Concurrent statements – Sequential statements – Transport and Inertial delays – Delta delays – Behavioral, Data flow and Structural modeling – Attributes – Generics – Packages and Libraries – Multivalued logic and Signal resolution – IEEE 1164 std logic – Subprograms: Functions and Procedures – Operator overloading – Test Benches – Design examples.                                        (9)


FAULT MODELING: Defects, errors, faults, Levels of Fault models, Types, Fault Detection and Redundancy in Combinational Logic circuits: Path sensitization method, Boolean difference method. Fault Detection in sequential logic circuit, Design for Testability: Scan path Testing, Boundary Scan Test, Built in Self Test for testing memories. (9)


FAULT TOLERANT SYSTEMS: Fault avoidance and fault tolerance - Techniques   of fault tolerance - Hardware fault tolerance : Static, Dynamic and Hybrid redundancy  - Fault tolerance in memories. Software Fault tolerance : Design of fault tolerant software - N-version programming - Recovery block - Reliability models for fault tolerant software - Validation of fault tolerant software.                                                                                  (7)


                                                                                                                                   Total   42

REFERENCES:        

1. Palmer, J.E., Perlman, D.E., "Introduction to Digital Systems",Tata McGraw Hill, New  Delhi, Reprint 1996.

2.     Nelson, V.P., Nagale, H.T., Carroll, B.D., and Irwin, J.D., "Digital Logic Circuit Analysis   and Design",          PrenticeHall International, Inc., New Jersey, 1995.

3. Robert K Dueck, “Digital Design with CPLD applications and VHDL”, Thomson Asia, 2002.

4. J. Bhaskar, “ A VHDL Primer”, Addison Wesley, 1999

5. Charles H Roth, “Digital Systems Design Using VHDL,” Thomson Asia,. 2004.

6. "Programmable Logic Devices Databook and Design Guide", National Semiconductors,   1989.

7. Michael L Bushnell, Vishwani D Agrawal, “Essentials of Electronic Testing For digital memory and mixed signal VLSI circuits”, Kluwer academic Publications, USA, 2001

8. Pradhan, D K., "Fault - Tolerant Computing - Theory and Techniques", Vol. I & II,   Prentice Hall, 1986.


09EA06/09ED21 VLSI DESIGN

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OVERVIEW OF VLSI DESIGN METHODOLOGY: VLSI design process - Architectural design - Logical design - Physical design - Layout styles - Full custom - Semicustom approaches. (4)


BASIC ELECTRICAL PROPERTIES OF MOS AND CMOS CIRCUITS : MOS transistor - Threshold voltage - Threshold voltage equations - MOS device equations - Basic DC equations - Second order effects - MOS models - Small signal AC characteristics - NMOS inverter - Depletion mode and enhancement mode pull ups – CMOS inverter - DC characteristics - Inverter delay - Pass transistor - Transmission gate – Power consumption in CMOS gates – Static dissipation – Dynamic Dissipation. (9)


VLSI FABRICATION TECHNIQUES : An overview of wafer fabrication – Wafer processing - Oxidation - Patterning - Diffusion - Ion implantation - Deposition – Silicon gate NMOS process - CMOS processes - NWell - PWell - Twintub - Silicon on insulator - CMOS process enhancements - Interconnect - Circuit elements- Latch up - Latchup prevention techniques. (7)


LAYOUT DESIGN RULES : Need for design rules - Mead Conway design rules for the silicon gate NMOS process - CMOS based design rules -Simple layout examples - Sheet resistance - Area capacitance - Wiring capacitance - Driving large capacitive loads. (6)


LOGIC DESIGN : Switch logic - Pass transistor and transmission gate based design - Gate logic - Inverter - Two input NAND gate - NOR gate - Other forms of CMOS logic – Dynamic CMOS logic - Clocked CMOS logic - Precharged domino CMOS logic - Structured design - Simple combinational logic design examples - Parity generator - Multiplexers – Clocked sequential circuits - Two phase clocking - Charge storage - Dynamic register element - NMOS and CMOS - Dynamic shift register - Semistatic register - JK flip flop circuit. (9)


SUBSYSTEM Design Process : General arrangement of a 4-bit arithmetic processor - Design of a 4bit shifter - Design of a ALU subsystem - Implementing ALU functions with an adder - Carry look ahead adders - Multipliers - Serial parallel multipliers – Pipelined multiplier array – Modified Booth's algorithm - Incrementer / Decrementer -Two phase non-overlapping clock generator. (7)

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